Note: Copyrights are owned by the publisher of the journal/conference. PDF files here are provided as a convenience for one-time individual use.

Book/Encyclopædia Chapters and Journal Papers  
[BJ25]  N. Shanbhag, S. Mitra, G. de Veciana, M. Orshansky, R. Marculescu, J. Roychowdhury, D. Jones and J. Rabaey, ``The Search for Alternative Computational Paradigms'', IEEE Design and Test of Computers, Vol. 25, Issue 4, pages 334-343, July-August 2008.
[BJ24]  S. Srivastava and J. Roychowdhury, ``Independent and Interdependent Latch Setup/Hold Time Characterization via Newton-Raphson Solution and Euler Curve Tracking of State-Transition Equations'', IEEE Trans. Computer-Aided Design, Vol. 27, No. 5, pages 817-830, May 2008.
[BJ23]  N. Dong and J. Roychowdhury, ``General-purpose nonlinear model order reduction based on piecewise polynomial representations'', IEEE Trans. Computer-Aided Design, Vol. 27, No. 2, pages 249-261, Feb 2008.
[BJ22]  T. Mei and J. Roychowdhury, ``A Time-Domain Oscillator Envelope Tracking Algorithm Employing Dual Phase Conditions'', IEEE Trans. Computer-Aided Design, Vol. 27, No. 1, pages 59-69, Jan 2008.
[BJ21]  S. Srivastava and J. Roychowdhury, ``Analytical Equations for Nonlinear Phase Errors and Jitter in Ring Oscillators'', IEEE Trans. Circuits and Systems I: Fundamental Theory and Applications, Vol. 54, Issue 10, pages 2321-2329, October 2007.
[BJ20]  (invited paper) R. Rutenbar, G. Gielen and J. Roychowdhury, ``Hierarchical Modeling, Optimization and Synthesis for System-Level Analog and RF Designs'', Proceedings of the IEEE, Vol. 95, No. 3, pages 640-669, March 2007.
[BJ19]  T. Mei and J. Roychowdhury, ``Small-Signal Analysis of Oscillators Using Generalized Multitime Partial Differential Equations'', IEEE Trans. Computer-Aided Design, Vol. 26, No. 6, pages 1054-1069, June 2007.
[BJ18]  (invited book chapter) J. Roychowdhury, ``Automated Macromodelling for Simulation of Signals and Noise in Mixed-Signal/RF Systems'', in Analog Circuit Design - RF Circuits: Wide band, Front-Ends, DACs, Design Methodology and Verification for RF and Mixed-Signal Systems, Low Power and Low Voltage (eds: Steyaert/van Roermund/Huijsing), Springer, January 2006.
[BJ17]  (invited book chapter) J. Roychowdhury and H.A. Mantooth, ``Analog and Mixed-Signal Simulation'', in Electronic Design Automation for Integrated Circuits Handbook (eds: Scheffer/Lavagno/Martin), CRC Press, April 2006. ISBN: 978-0849330964.
[BJ16]  J. Roychowdhury and R. Melville, ``Delivering Global DC Convergence for Large Mixed-Signal Circuits via Homotopy/Continuation Methods'', IEEE Trans. Computer-Aided Design, Jan 2006.
[BJ15]  J. Roychowdhury, ``Resolving Fundamental Issues of Slowness in Envelope Simulation Methods'', International Journal of RF and Microwave Computer-Aided Engineering, Vol 15, No 4, pages 371-381, July 2005.
[BJ14]  (invited paper) J. Roychowdhury, ``A Multi-Time Circuit Formulation for Closely-Spaced Frequencies'', International Journal of RF and Microwave Computer-Aided Engineering, Vol 15, No 4, pages 382-393, July 2005.
[BJ13]  (D.O. Pederson Best Paper Nomination) T. Mei, J. Roychowdhury, T. Coffey, S. Hutchinson and D. Day ``Stability Analysis of Time-Domain Methods for Solving MPDEs of Fast/Slow Systems'', IEEE Trans. Computer-Aided Design, Feb 2005.
[BJ12]  (invited paper) Z. Wang, R. Murgai and J. Roychowdhury, ``ADAMIN: Automated, Accurate Macromodelling of Digital Aggressors for Power/Ground/Substrate Noise Prediction'', IEEE Trans. Computer-Aided Design, Jan 2005.
[BJ11]  X. Lai and J. Roychowdhury, ``Capturing Oscillator Injection Locking via Nonlinear Phase-Domain Macromodels'', IEEE J. Microwave Theory and Techniques, Vol. 52, No. 9, pp. 2251-2261, September 2004.
[BJ10]  O. Narayan and J. Roychowdhury, ``Analyzing Oscillators using Multitime PDEs'', IEEE Trans. Circuits and Systems I: Fundamental Theory and Applications, Vol. 50, July 2003, pp. 894-903.
[BJ9]  A. Demir and J. Roychowdhury, ``A Reliable and Efficient Procedure for Oscillator PPV Computation, with Phase Noise Macromodelling Applications'', IEEE Trans. Computer-Aided Design, Vol. 22, Feb 2003, pp. 188-197.
[BJ8]  (invited book chapter) J. Roychowdhury, ``Multi-Time PDEs for Dynamical System Analysis'', in Applied and Computational Control, Signals and Circuits (ed: Datta), Kluwer Academic Publishers, September 2001.
[BJ7]  (invited book chapter) J. Roychowdhury, ``Analysis and simulation of RF subsystems'', in Low power design techniques and CAD tools for analog and RF integrated circuits (eds: Wambacq/Gielen/Gerrits), Kluwer Academic Publishers, July 2001.
[BJ6]  J. Roychowdhury, ``Analyzing Circuits with Widely Separated Time Scales using Numerical PDE Methods'', IEEE Trans. Circuits and Systems I: Fundamental Theory and Applications, Vol. 48, May 2001, pp. 578-594.
[BJ5]  A. Demir, A. Mehrotra, and J. Roychowdhury, ``Phase Noise in Oscillators: A Unifying Theory and Numerical Methods for Characterization'', IEEE Trans. Circuits and Systems I: Fundamental Theory and Applications, Vol. 47, May 2000, pp. 655-674.
[BJ4]  K. Mayaram, D.C. Lee, S. Moinian, D. Rich and J. Roychowdhury, ``Overview of Computer-Aided Analysis Tools for RFIC Simulation: Algorithms, Features, and Limitations'', IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, Vol. 47, April 2000, pp. 274-286.
[BJ3]  J. Roychowdhury, ``Reduced-order Modelling of Time-Varying Systems'', IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, Vol. 46, October 1999, pp. 1273-1288.
[BJ2]  (invited paper) J. Roychowdhury, D. Long and P. Feldmann, ``Cyclostationary Noise Analysis of Large RF Circuits with Multi-tone Excitations'', IEEE J. Solid-State Circuits, Vol. 33, March 1998, pp. 324-336.
[BJ1]  J. Roychowdhury, A.R. Newton and D.O. Pederson, ``Algorithms for the Transient Simulation of Lossy Interconnect'', IEEE Trans. Computer-Aided Design, Vol. 13, January 1994, pp. 96-104.


Reviewed Conference Papers in Archival Proceedings  
[C73]  P. Bhansali and J. Roychowdhury, ``Gen-Adler: The generalized Adler's equation for injection locking analysis in oscillators'', Proc. IEEE Asia South-Pacific Design Automation Conference, pp. 522-527, Jan. 2009.
[C72]  C. Gu and J. Roychowdhury, ``Model Reduction via Projection onto Nonlinear Manifolds, with Applications to Analog Circuits and Biochemical Systems'', Proc. IEEE International Conference on Computer-Aided Design, pp. 85-92, Nov. 2008.
[C71]  P. Bhansali, S. Srivastava, X. Lai and J. Roychowdhury, ``Comprehensive Procedure for Fast and Accurate Coupled Oscillator Network Simulation'', Proc. IEEE International Conference on Computer-Aided Design, pp. 815 - 820, Nov. 2008.
[C70]  S. Agarwal and J. Roychowdhury, ``Efficient Multiscale Simulation of Circadian Rhythms Using Automated Phase Macromodelling Techniques'', Proc. Pacific Symposium on Biocomputing, v. 13, pages 402-413, Jan. 2008.
[C69]  (best paper) C. Gu and J. Roychowdhury, ``An Efficient, Fully Nonlinear, Variability-Aware non-Monte-Carlo Yield Estimation Procedure with Applications to SRAM cells and Ring Oscillators'', Proc. IEEE Asia South-Pacific Design Automation Conference, Jan. 2008.
[C68]  S. Srivastava and J. Roychowdhury, ``Rapid Estimation of the Probability of SRAM Failure due to MOS Threshold Variations'', Proc. IEEE Custom Integrated Circuits Conference, Oct. 2007.
[C67]  Z. Wang and J. Roychowdhury, ``Obtaining Frequency Sensitivities to Variations Analytically from Parameterized Nonlinear Oscillator Phase Macromodels'', Proc. IEEE Custom Integrated Circuits Conference, Oct. 2007.
[C66]  (best paper) S. Srivastava and J. Roychowdhury, ``Interdependent Latch Setup/Hold Time Characterization via Euler-Newton Curve Tracing on State-Transition Equations'', Proc. IEEE Design Automation Conference, June 2007. [Presentation]
[C65]  Z. Wang, X. Lai and J. Roychowdhury, ``PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels'', Proc. IEEE Design Automation Conference, June 2007. [Presentation]
[C64]  S. Srivastava and J. Roychowdhury, ``Rapid and Accurate Latch Characterization via Direct Newton Solution of Setup/Hold Times'', Proc. IEEE Conference on Design, Automation and Test in Europe, April 2007. [Presentation]
[C63]  (invited paper) X. Lai and J. Roychowdhury, ``Advanced Tools for Simulation and Design of Oscillators/PLLs'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 2007.
[C62]  S. Dabas, N. Dong and J. Roychowdhury, ``Automated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 2007. [Presentation]
[C61]  X. Lai and J. Roychowdhury, ``TP-PPV: Piecewise Nonlinear, Time-Shifted Oscillator Macromodel Extraction for Fast, Accurate PLL Simulation'', Proc. IEEE International Conference on Computer-Aided Design, November 2006.
[C60]  T. Mei and J. Roychowdhury, ``PPV-HB: Harmonic Balance for Oscillator/PLL Phase Macromodels'' Proc. IEEE International Conference on Computer-Aided Design, November 2006.
[C59]  T. Mei and J. Roychowdhury, ``Rigorous Analytical/Graphical Injection Locking Analysis of Two-Port Negative Resistance Oscillators'', Proc. IEEE Custom Integrated Circuits Conference, September 2006.
[C58]  S. Srivastava, X. Lai and J. Roychowdhury, ``Nonlinear Phase-Macromodel-Based Simulation/Design of PLLs with Superharmonically Locked Dividers'', Proc. IEEE Custom Integrated Circuits Conference, September 2006.
[C57]  T. Mei and J. Roychowdhury, ``A Robust Envelope Following Method Applicable to Both Non-autonomous and Oscillatory Circuits'', Proc. IEEE Design Automation Conference, pp. pages 1029-1034 July 2006.
[C56]  X. Lai and J. Roychowdhury, ``A Multilevel Technique for Robust and Efficient Extraction of Phase Macromodels of Digitally Controlled Oscillators'', Proc. IEEE Design Automation Conference, July 2006.
[C55]  T. Mei and J. Roychowdhury, ``Efficient AC Analysis of Oscillators Using Least-Squares Methods'', Proc. IEEE Conference on Design, Automation and Test in Europe, March 2006.
[C54]  P. Goyal, X. Lai and J. Roychowdhury, ``A Fast Methodology for First-Time-Correct Design of PLLs Using Nonlinear Phase-Domain VCO Macromodels'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 2006.
[C53]  X. Lai and J. Roychowdhury, ``Fast Simulation of Large Networks of Nanotechnological and Biochemical Oscillators for Investigating Self-Organization Phenomena'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 2006.
[C52]  X. Lai and J. Roychowdhury, ``Macromodelling Oscillators Using Krylov-Subspace Methods'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 2006.
[C51]  T. Mei and J. Roychowdhury, ``An Efficient and Robust Technique for Tracking Amplitude and Frequency Envelopes in Oscillators'', Proc. IEEE International Conference on Computer-Aided Design, Nov 2005.
[C50]  T. Mei and J. Roychowdhury, ``Oscillator-AC: Restoring Rigour to Linearized Small Signal Analysis of Oscillators'', Proc. IEEE International Conference on Computer-Aided Design, Nov 2005.
[C49]  K. Boianapally, T. Mei and J. Roychowdhury, ``A Multi-Harmonic Probe Technique for Computing Oscillator Steady States'', Proc. IEEE International Conference on Computer-Aided Design, Nov 2005.
[C48]  B. Gu, K. Gullapalli, S. Hamm, B. Mulvaney, X. Lai and J. Roychowdhury, ``Implementing nonlinear oscillator macromodel using Verilog-AMS for accurate prediction of injection locking behaviors of oscillators'', Proc. IEEE Behavioral Modeling and Simulation Workshop, September 2005.
[C47]  X. Lai, Y. Wan and J. Roychowdhury, ``Understanding Injection Locking in Negative Resistance LC Oscillators Intuitively Using Nonlinear Feedback Analysis'', Proc. IEEE Custom Integrated Circuits Conference, September 2005.
[C46]  X. Lai and J. Roychowdhury, ``Analytical Equations For Predicting Injection Locking in LC and Ring Oscillators'', Proc. IEEE Custom Integrated Circuits Conference, September 2005.
[C45]  (invited paper) X. Lai and J. Roychowdhury, ``Coupled Oscillator Simulation'', Proc. International Microwave Symposium, June 2005.
[C44]  Y. Wan and J. Roychowdhury, ``Operator-based Model-Order Reduction of Linear Periodically Time-Varying Systems'', Proc. IEEE Design Automation Conference, June 2005.
[C43]  N. Dong and J. Roychowdhury, ``Automated Nonlinear Macromodelling of Output Buffers for High-Speed Digital Applications'', Proc. IEEE Design Automation Conference, June 2005.
[C42]  (best paper) X. Lai, Y. Wan and J. Roychowdhury, ``Fast PLL Simulation Using Nonlinear VCO Macromodels for Accurate Prediction of Jitter and Cycle-Slipping due to Loop Non-idealities and Supply Noise'', Proc. IEEE Asia South-Pacific Design Automation Conference, Jan 2005.
[C41]  J. Roychowdhury, ``Exact Analytical Equations for Predicting Nonlinear Phase Errors and Jitter in Ring Oscillators'', Proc. IEEE International Conference on VLSI Design, Jan 2005.
[C40]  (best paper nomination) X. Lai and J. Roychowdhury, ``Automated Oscillator Macromodelling Techniques for Capturing Amplitude Variations and Injection Locking'', Proc. IEEE International Conference on Computer-Aided Design, Nov 2004. 2004-ICCAD-Lai-Roychowdhury-preprint.pdf
[C39]  X. Lai and J. Roychowdhury, ``Fast, Accurate Prediction of PLL Jitter Induced by Power Grid Noise'', Proc. IEEE Custom Integrated Circuits Conference, Oct 2004.
[C38]  N. Dong and J. Roychowdhury, ``Automated Extraction of Broadly-Applicable Nonlinear Analog Macromodels from SPICE-level Descriptions'', Proc. IEEE Custom Integrated Circuits Conference, Oct 2004.
[C37]  (invited paper) J. Roychowdhury, ``An Overview of Automated Macromodelling Techniques for Mixed-Signal Systems'', Proc. IEEE Custom Integrated Circuits Conference, Oct 2004.
[C36]  T. Mei, T. Coffey, S. Hutchinson, D. Day and J. Roychowdhury, ``Robust, Stable Time-Domain Methods for Solving MPDEs of Fast/Slow Systems'', Proc. IEEE Design Automation Conference, June 2004.
[C35]  Z. Wang, R. Murgai and J. Roychowdhury, ``Macromodelling of Digital Libraries for Substrate Noise Analysis'', Proc. IEEE International Symposium on Circuits and Systems, May 2004.
[C34]  (invited paper) J. Roychowdhury, ``Algorithmic methods for bottom-up generation of system-level RF macromodels'', IEEE-EURASIP International Symposium on Control, Communications, and Signal Processing, Hammamet, Tunisia, March 2004.
[C33]  Z. Wang, R. Murgai and J. Roychowdhury, ``Automated, accurate macromodelling of digital aggressors for power/ground/substrate noise prediction'', Proc. IEEE Conference on Design, Automation and Test in Europe, Feb 2004.
[C32]  P. Ghanta, Z. Li and J. Roychowdhury, ``Analytical Expressions for Phase Noise Eigenfunctions of LC Oscillators'', Proc. IEEE Asia South-Pacific Design Automation Conference, Jan 2004.
[C31]  (invited paper) J. Roychowdhury, Algorithmic Macromodelling Methods for Mixed-Signal Systems, IEEE VLSI Design Conference, Mumbai, India, Jan 2004.
[C30]  (invited plenary session address) J. Roychowdhury, Automated Macromodel Generation for Electronic Systems, IEEE Behavioral Modeling and Simulation Workshop, San Jose, CA, Oct 2003.
[C29]  N. Dong and J. Roychowdhury, ``Piecewise Polynomial Nonlinear Model Reduction'', Proc. IEEE Design Automation Conference, June 2003.
[C28]  J. Roychowdhury, ``Making Fourier-Envelope Simulation Robust'', Proc. IEEE International Conference on Computer-Aided Design, November 2002.
[C27]  J. Roychowdhury, ``A Time-domain RF Steady-State Method for Closely Spaced Tones'', Proc. IEEE Design Automation Conference, June 2002.
[C26]  J. Roychowdhury, ``Theory and Algorithms for RF Sensitivity Computation'', Proc. IEEE International Symposium on Circuits and Systems, May 2002.
[C25]  (invited paper) P. Wambacq, G. Vandersteen, J. Phillips, J. Roychowdhury, W. Eberle, B. Yang, D. Long and A. Demir, ``CAD for RF Circuits'', Proc. IEEE Conference on Design, Automation and Test in Europe, March 2001.
[C24]  A. Demir and J. Roychowdhury, ``Computing Phase Noise Eigenfunctions Directly from Steady-State Jacobian Matrices'', Proc. IEEE International Conference on Computer-Aided Design, November 2000.
[C23]  J. Roychowdhury, ``Automated Macromodelling of `Nonlinear' Wireless Blocks'', Proc. IEEE Custom Integrated Circuits Conference, May 1999.
[C22]  (best paper) J. Roychowdhury, ``Reduced-order Modelling of Time-Varying Systems'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 1999.
[C21]  (best paper nomination) O. Narayan and J. Roychowdhury, ``Analyzing Forced Oscillators with Multiple Time Scales'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 1999.
[C20]  J. Roychowdhury. ``Reduced-order Modelling of Linear Time-Varying Systems'', Proc. IEEE International Conference on Computer-Aided Design, November 1998.
[C19]  J. Roychowdhury, ``Analyzing strongly nonlinear multitone circuits by multi-time methods'', Proc. European Microwave Conference, September 1998.
[C18]  A. Dunlop, A. Demir, P. Feldmann, S. Kapur, D. Long, R. Melville and J. Roychowdhury, ``Tools and Methodology for RF IC Design'', Proc. IEEE Design Automation Conference, June 1998.
[C17]  A. Demir, A Mehrotra and J. Roychowdhury, ``Phase Noise in Oscillators - A Unifying Theory and Numerical Methods for Characterization'', Proc. IEEE Design Automation Conference, June 1998.
[C16]  A. Demir, A Mehrotra and J. Roychowdhury, ``Phase Noise and Timing Jitter in Oscillators'', Proc. IEEE Custom Integrated Circuits Conference, May 1998.
[C15]  J. Roychowdhury, ``MPDE Methods for Efficient Analysis of Wireless Systems'', Proc. IEEE Custom Integrated Circuits Conference, May 1998.
[C14]  (best paper) J. Roychowdhury, ``Efficient Methods for Simulating Highly Nonlinear Multi-rate Circuits'', Proc. IEEE Design Automation Conference, June 1997.
[C13]  (invited paper) K. Mayaram, D.C. Lee, S. Moinian, D. Rich and J. Roychowdhury, ``Overview of Computer-Aided Analysis Tools for RFIC Simulation: Algorithms, Features, and Limitations'', Proc. IEEE Custom Integrated Circuits Conference, May 1997.
[C12]  J. Roychowdhury, D. Long and P. Feldmann, ``Cyclostationary Noise Analysis of Large RF Circuits with Multi-tone Excitations'', Proc. IEEE Custom Integrated Circuits Conference, May 1997.
[C11]  (best paper) J. Roychowdhury and P. Feldmann, ``A New Linear-Time Harmonic Balance Algorithm for Cyclostationary Noise Analysis in RF Circuits'', Proc. IEEE Asia South-Pacific Design Automation Conference, January 1997.
[C10]  P. Feldmann and J. Roychowdhury, ``Computation of Circuit Waveform Envelopes Using an Efficient, Matrix-Decomposed Harmonic Balance Algorithm'', Proc. IEEE International Conference on Computer-Aided Design, November 1996.
[C9]  S. Kapur, D. Long and J. Roychowdhury, ``Efficient time-domain simulation of frequency-dependent elements'', Proc. IEEE International Conference on Computer-Aided Design, November 1996.
[C8]  J. Roychowdhury and R.C. Melville, ``Homotopy Techniques for Obtaining a DC Solution of Large-Scale MOS Circuits'', Proc. IEEE Design Automation Conference, June 1996.
[C7]  J. Roychowdhury, ``A New Technique for the Efficient Solution of Singular Circuits'', Proc. IEEE Custom Integrated Circuits Conference, May 1996.
[C6]  R.C. Melville, P. Feldmann and J. Roychowdhury, ``Efficient Multi-tone Distortion Analysis of Analog Integrated Circuits'', Proc. IEEE Custom Integrated Circuits Conference, May 1995.
[C5]  J. Roychowdhury, ``Avoiding Dispersion in Distributed RLC Lines by Shaping'', Proc. IEEE Multi-Chip Module Conference, February 1995.
[C4]  J. Roychowdhury, A.R. Newton and D.O. Pederson, ``An Exact Analytic Technique for Simulating Uniform RC Lines'', Proc. European Design Automation Conference, September 1992.
[C3]  (best paper nomination) J. Roychowdhury, A.R. Newton and D.O. Pederson, ``Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time'', Proc. IEEE Design Automation Conference, June 1992.
[C2]  (distinguished paper) J. Roychowdhury, A.R. Newton and D.O. Pederson, ``A Convolution-Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation'', Proc. IEEE International Conference on Computer-Aided Design, November 1991.
[C1]  (best paper nomination) J. Roychowdhury and D.O. Pederson, ``Efficient Transient Simulation of Lossy Interconnect'', Proc. IEEE Design Automation Conference, June 1991.